Power supply noise generated within a semiconductor integrated circuit device (LSI) is increased by microfabrication within the LSI chip and by higher speed. Furthermore, with advances that have been made in lowering voltage, there has been a remarkable increase in cases in which noise, clock fluctuation (jitter) and temperature variations, etc., give rise to chip malfunction. Further, owing to the higher integration that accompanies microfabrication, behavior within the chip is becoming increasingly complex and it has become difficult to readily estimate malfunction. Accordingly, direct observation of behavior such as noise, jitter and temperature variations within LSI chips in order to specify the cause of malfunction is important.
The general practice conventionally is to sample the power supply and signals externally of the integrated circuit and observe the behavior of the power supply and signals. As the operating frequency of the integrated circuit rises, noise and jitter, etc., having high-frequency components increase. As a consequence, it is difficult to observe noise and jitter within an integrated circuit accurately outside the integrated circuit. Further, in cases where a signal or clock is sampled externally of an integrated circuit, noise and jitter produced in the course of extracting the signal or clock to the exterior of the integrated circuit occur in addition to the noise and jitter produced within the integrated circuit. This makes it difficult to estimate noise and jitter accurately at the point of measurement.
Accordingly, a measuring device is incorporated within a chip, phenomena within the chip are observed by the on-chip phenomena measuring device and the device converts the result of measurement to a digital signal that is readily extracted to the outside of the chip. Such an on-chip phenomena measuring device is effective. The flow of extracting the result of measurement to the chip exterior, applying a conversion to the data extracted externally of the chip and visualizing the behavior of the phenomena is digitized by the on-chip phenomena measuring device. The problem of signal degradation along the signal path can be solved by such processing.
If result of measurement is retained in such a device, there is the danger that the amount of storage will be very great. Accordingly, a trace-data sampling method of lengthening the trace time of the status of registers within an LSI chip without greatly enlarging the scale of the hardware has been disclosed in, e.g., Patent Document 1 as a technique for reducing amount of storage. This method groups a number of registers of the LSI chip or device into a plurality of register groups, selects an event flag in each group and records the values of a register group together with the recording interval only when any one of the event flags is ON. Accordingly, only valid data and the timing of the occurrence thereof are recorded, thereby making possible tracing over a length of time longer than in the conventional case.
Further, Patent Document 2 describes a compressive storage device which, in a case where a successively occurring event is subjected to data compression and then stored, is capable of subsequently specifying a change in stored events and time at which the change occurred. This device stores a time stamp, which specifies the time at which an event change occurred, in a storage unit only when a successively occurring event changes from a reference event or only when a change from a reference event changes. Accordingly, storage capacity necessary for the storage unit can be greatly reduced and it is possible to simply specify the time of occurrence of any measurement data stored in the storage unit.
A trace device capable of simultaneously recording, editing and outputting elapsed-time information when a program is executed is described in Patent Document 3 as related art. This device is such that whenever each instruction phase of a program run by a microprocessor is executed, information about the time at which each instruction was executed and a history of trace-result information are recorded and can be output in correlated form. This makes it possible to perform program debugging efficiently.
[Patent Document 1]                Japanese Patent No. 3711884        
[Patent Document 2]                Japanese Patent Kokai Publication No. JP-A-8-223254        
[Patent Document 3]                Japanese Patent Kokai Publication No. JP-A-10-260864        